One objective when designing integrated circuits involves the reduction of necessary power consumption by the resultant design. During use, various logic elements such as flip flops, etc. require power each time they are switched at each clock cycle. There is thus a desire to disable such logic when, of course, it does not impact the desired functionality of the integrated circuit design.
However, such task of determining when different logic can be disabled can be problematic. For example, additional logic is often required to determine the conditions in which such disabling is appropriate. In some cases, power consumption of such additional logic can negate any power savings on the original integrated circuit design.
There is thus a need for addressing these and/or other issues associated with the prior art.